The present invention relates generally to semiconductors, and more specifically, to an ultra-thin reference layer for spin torque transfer (STT) magnetic random access memory (MRAM).
Magnetic random access memory (MRAM) is a non-volatile computer memory (NVRAM) technology. Unlike conventional RAM chip technologies, in MRAM data is not stored as electric charge or current flows, but by magnetic storage elements. The elements are formed using two ferromagnetic plates, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity; the other's magnetic field can be changed. This configuration is known as a spin valve and is the simplest structure for a MRAM bit. A memory device is built from a grid of such “cells”.
A typical method of reading is accomplished by measuring the electrical resistance of the cell. A particular cell is (typically) selected by turning on an associated access transistor which passes current from a supply line through the cell to ground. Due to the magnetic tunnel effect, the electrical resistance of the cell changes with the relative orientation of the fields between the two plates. By measuring the resulting current, the resistance associated with any particular cell can be determined, and from this magnetic orientation of the writable plate (i.e., free layer). Typically if the two plates have the same orientation the cell is considered to hold a value of “0”, while if the two plates are of opposite orientation the resistance will be higher and will hold a value of “1”.